- Single FPGA configurations starting at $4,450
- 32/64 bit PCI-based PWB with six interconnected FPGA's
- Universal PCI (Virtex FPGA's) or 3.3v PCI (Virtex-E FPGA's)
connector
- 300K–1.8M (LSI-measured) ASIC gates per PWB
- Stackable to 4 (or more) PWB's
- Flexible, abundant and configurable embedded memory up to 73
Kbytes single port RAM/ROM or 36 Kbytes of dual port RAM
- HW locking mechanisms to protect IP
- 4 low skew clocks:
- PCI Clock
- 2 Socketed oscillators
- 1 User Configured via CPLD
- Fast 32/64 bit PCI host for configuration and testing
- Robust observation/debugging capability with 450 connections
for logic analyzer or pattern generator stimulus
- User configurable status LED's
- User designed daughter PWB for custom circuitry
- Concise Data Sheet [PDF]
(314KB)
- Full Data Sheet [PDF]
(892KB)
- Errata Sheet [PDF]
(22KB)
- Board Diagram w/ Jumpers Annotated [PDF]
(487KB)
- Block Diagram [GIF] (21KB)
- Files for use with Synplicity Certify:
- For DN2000k10's stuffed with Xilinx XCV1000bg560 FPGA's:
- For DN2000k10's stuffed with Xilinx XCV2000ebg560 FPGA's:
- DN2000K10 support files:
- AETEST Utility & USB Controller
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DN2000K10
ASIC Prototyping Engine
The DN2000k10 is a complete logic emulation system
that enables ASIC or IP designers a vehicle to prototype logic
and memory designs for a fraction of the cost of existing solutions.
The DN2000k10 can be hosted in 32/64 bit PCI slot, or can be used
stand-alone. A single DN2000k10 with all six FPGA's stuffed can
emulate up to 2 million gates of logic as measured by LSI. Multiple
DN2000k10's can be stacked to get even more total logic gates.
The DN2000k10 achieves high gate density and allows
for fast target clock frequencies by utilizing one, four, or six
FPGA's from Xilinx's Virtex TM family for logic and memory. High
I/O-count BGA packages are employed allowing for abundant, fixed
interconnect between FPGA's. 450 test pins are provided on both
the top and bottom of the PWB for the purpose of stacking up to
four PWB's to increase the amount of logic, for logic analyzer-based
debugging, or for pattern generator stimulus. Custom daughter
cards can be mounted to these pins to interface the DN2000k10
to application specific circuits. A Verilog and VHDL reference
PCI target design and test bench is provided at no additional
cost. PWB configurations can be stored in the FLASH, and jumpers
are provided to switch between configurations. Eight LED’s are
connected to the CPLD and each LED can be user-configured to provide
valuable visual feedback.
Click thumbnail for a larger view.
With six FPGA's:
With one FPGA:
:
PCI connectors, 3.3 and 5 volt:
Other views:
The bottom:
In a clock-slowed PC:
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